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Searched refs:SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9352 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK 0x000f0000L macro
H A Dgfx_7_2_sh_mask.h11929 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK 0xf0000 macro
H A Dgfx_8_0_sh_mask.h13775 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK 0xf0000 macro
H A Dgfx_8_1_sh_mask.h14173 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK 0xf0000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21718 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK … macro
H A Dgc_9_2_1_sh_mask.h22996 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK … macro
H A Dgc_9_1_sh_mask.h23029 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK … macro
H A Dgc_9_4_3_sh_mask.h25191 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK … macro
H A Dgc_9_4_2_sh_mask.h16811 #define SQ_PERFCOUNTER5_SELECT__SQC_CLIENT_MASK_MASK … macro