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Searched refs:SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9346 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK 0x0f000000L macro
H A Dgfx_7_2_sh_mask.h11933 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK 0xf000000 macro
H A Dgfx_8_0_sh_mask.h13779 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK 0xf000000 macro
H A Dgfx_8_1_sh_mask.h14177 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK 0xf000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21720 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK … macro
H A Dgc_9_2_1_sh_mask.h22998 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK … macro
H A Dgc_9_1_sh_mask.h23031 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK … macro
H A Dgc_9_4_3_sh_mask.h25193 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK … macro
H A Dgc_9_4_2_sh_mask.h16813 #define SQ_PERFCOUNTER5_SELECT__SIMD_MASK_MASK … macro