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Searched refs:SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9263 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT 0x0000001c macro
H A Dgfx_7_2_sh_mask.h12056 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT 0x1c macro
H A Dgfx_8_1_sh_mask.h14300 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT 0x1c macro
H A Dgfx_8_0_sh_mask.h13902 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT 0x1c macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21845 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_9_1_sh_mask.h23156 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h23123 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h25318 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h16938 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h32034 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h31732 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h34532 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h30069 #define SQ_PERFCOUNTER15_SELECT__PERF_MODE__SHIFT … macro