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Searched refs:SQ_MTBUF_0__OP_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9120 #define SQ_MTBUF_0__OP_MASK 0x00070000L macro
H A Dgfx_7_2_sh_mask.h13043 #define SQ_MTBUF_0__OP_MASK 0x70000 macro
H A Dgfx_8_0_sh_mask.h14949 #define SQ_MTBUF_0__OP_MASK 0x78000 macro
H A Dgfx_8_1_sh_mask.h15347 #define SQ_MTBUF_0__OP_MASK 0x78000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2806 #define SQ_MTBUF_0__OP_MASK macro
H A Dgc_9_2_1_sh_mask.h2612 #define SQ_MTBUF_0__OP_MASK macro
H A Dgc_9_1_sh_mask.h2654 #define SQ_MTBUF_0__OP_MASK macro
H A Dgc_9_4_3_sh_mask.h3078 #define SQ_MTBUF_0__OP_MASK macro
H A Dgc_9_4_2_sh_mask.h26289 #define SQ_MTBUF_0__OP_MASK macro