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Searched refs:SQ_MTBUF_0__IDXEN_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9112 #define SQ_MTBUF_0__IDXEN_MASK 0x00002000L macro
H A Dgfx_7_2_sh_mask.h13037 #define SQ_MTBUF_0__IDXEN_MASK 0x2000 macro
H A Dgfx_8_0_sh_mask.h14945 #define SQ_MTBUF_0__IDXEN_MASK 0x2000 macro
H A Dgfx_8_1_sh_mask.h15343 #define SQ_MTBUF_0__IDXEN_MASK 0x2000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2804 #define SQ_MTBUF_0__IDXEN_MASK … macro
H A Dgc_9_2_1_sh_mask.h2610 #define SQ_MTBUF_0__IDXEN_MASK … macro
H A Dgc_9_1_sh_mask.h2652 #define SQ_MTBUF_0__IDXEN_MASK … macro
H A Dgc_9_4_3_sh_mask.h3076 #define SQ_MTBUF_0__IDXEN_MASK … macro
H A Dgc_9_4_2_sh_mask.h26287 #define SQ_MTBUF_0__IDXEN_MASK … macro