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Searched refs:SQ_IND_INDEX__FORCE_READ_MASK (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2952 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
2965 (SQ_IND_INDEX__FORCE_READ_MASK) | in wave_read_regs()
H A Dgfx_v7_0.c4093 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
4106 (SQ_IND_INDEX__FORCE_READ_MASK) | in wave_read_regs()
H A Dgfx_v9_4_2.c1812 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
H A Dgfx_v9_4_3.c556 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
569 (SQ_IND_INDEX__FORCE_READ_MASK) | in wave_read_regs()
H A Dgfx_v8_0.c5199 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
5212 (SQ_IND_INDEX__FORCE_READ_MASK) | in wave_read_regs()
H A Dgfx_v9_0.c1752 (SQ_IND_INDEX__FORCE_READ_MASK)); in wave_read_ind()
1765 (SQ_IND_INDEX__FORCE_READ_MASK) | in wave_read_regs()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9004 #define SQ_IND_INDEX__FORCE_READ_MASK 0x00002000L macro
H A Dgfx_7_2_sh_mask.h12407 #define SQ_IND_INDEX__FORCE_READ_MASK 0x2000 macro
H A Dgfx_8_0_sh_mask.h14277 #define SQ_IND_INDEX__FORCE_READ_MASK 0x2000 macro
H A Dgfx_8_1_sh_mask.h14675 #define SQ_IND_INDEX__FORCE_READ_MASK 0x2000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2632 #define SQ_IND_INDEX__FORCE_READ_MASK macro
H A Dgc_9_2_1_sh_mask.h2438 #define SQ_IND_INDEX__FORCE_READ_MASK macro
H A Dgc_9_1_sh_mask.h2480 #define SQ_IND_INDEX__FORCE_READ_MASK macro
H A Dgc_9_4_3_sh_mask.h2831 #define SQ_IND_INDEX__FORCE_READ_MASK macro
H A Dgc_9_4_2_sh_mask.h26068 #define SQ_IND_INDEX__FORCE_READ_MASK macro