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Searched refs:SQC_CONFIG__FORCE_2_BANK_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h13471 #define SQC_CONFIG__FORCE_2_BANK_MASK 0x4000 macro
H A Dgfx_8_1_sh_mask.h13869 #define SQC_CONFIG__FORCE_2_BANK_MASK 0x4000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2129 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_9_2_1_sh_mask.h1998 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_9_1_sh_mask.h1977 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_9_4_3_sh_mask.h2116 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_9_4_2_sh_mask.h25405 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_11_0_0_sh_mask.h6990 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_11_0_3_sh_mask.h7847 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_10_1_0_sh_mask.h7689 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro
H A Dgc_10_3_0_sh_mask.h8006 #define SQC_CONFIG__FORCE_2_BANK_MASK … macro