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Searched refs:SPR_40x_DBCR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dcpu.h2227 #define SPR_40x_DBCR0 (0x3F2) macro
H A Dcpu_init.c1157 spr_register(env, SPR_40x_DBCR0, "DBCR0", in register_405_sprs()