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Searched refs:SPR_405_SU0R (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dcpu.h2182 #define SPR_405_SU0R (0x3BC) macro
H A Dcpu_init.c1220 spr_register(env, SPR_405_SU0R, "SU0R", in register_405_sprs()