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Searched refs:SPI_START_PHASE__VGPR_START_PHASE_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10821 #define SPI_START_PHASE__VGPR_START_PHASE_MASK 0x3 macro
H A Dgfx_8_1_sh_mask.h11219 #define SPI_START_PHASE__VGPR_START_PHASE_MASK 0x3 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4164 #define SPI_START_PHASE__VGPR_START_PHASE_MASK macro
H A Dgc_9_2_1_sh_mask.h3563 #define SPI_START_PHASE__VGPR_START_PHASE_MASK macro
H A Dgc_9_1_sh_mask.h3699 #define SPI_START_PHASE__VGPR_START_PHASE_MASK macro
H A Dgc_9_4_3_sh_mask.h4397 #define SPI_START_PHASE__VGPR_START_PHASE_MASK macro
H A Dgc_9_4_2_sh_mask.h24499 #define SPI_START_PHASE__VGPR_START_PHASE_MASK macro