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Searched refs:SPI_PS_INPUT_CNTL_2__DUP_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7950 #define SPI_PS_INPUT_CNTL_2__DUP_MASK 0x00040000L macro
H A Dgfx_7_2_sh_mask.h8335 #define SPI_PS_INPUT_CNTL_2__DUP_MASK 0x40000 macro
H A Dgfx_8_0_sh_mask.h9601 #define SPI_PS_INPUT_CNTL_2__DUP_MASK 0x40000 macro
H A Dgfx_8_1_sh_mask.h9999 #define SPI_PS_INPUT_CNTL_2__DUP_MASK 0x40000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15598 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_9_2_1_sh_mask.h16782 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_9_1_sh_mask.h16907 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_9_4_3_sh_mask.h19081 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_9_4_2_sh_mask.h9031 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_11_0_0_sh_mask.h20710 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_11_0_3_sh_mask.h23040 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_10_1_0_sh_mask.h23103 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro
H A Dgc_10_3_0_sh_mask.h21217 #define SPI_PS_INPUT_CNTL_2__DUP_MASK macro