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Searched refs:SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7844 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK 0x00000300L macro
H A Dgfx_7_2_sh_mask.h8531 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK 0x300 macro
H A Dgfx_8_0_sh_mask.h10001 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK 0x300 macro
H A Dgfx_8_1_sh_mask.h10399 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK 0x300 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16019 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_9_2_1_sh_mask.h17203 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_9_1_sh_mask.h17328 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_9_4_3_sh_mask.h19502 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_9_4_2_sh_mask.h9452 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_11_0_0_sh_mask.h21164 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_11_0_3_sh_mask.h23494 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_10_1_0_sh_mask.h23524 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro
H A Dgc_10_3_0_sh_mask.h21671 #define SPI_PS_INPUT_CNTL_19__DEFAULT_VAL_MASK macro