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Searched refs:SPI_PS_INPUT_CNTL_10__DUP__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7739 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT 0x00000012 macro
H A Dgfx_7_2_sh_mask.h8432 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT 0x12 macro
H A Dgfx_8_0_sh_mask.h9794 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT 0x12 macro
H A Dgfx_8_1_sh_mask.h10192 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT 0x12 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15786 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h16970 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_9_1_sh_mask.h17095 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h19269 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h9219 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h20913 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h23243 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h23291 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h21420 #define SPI_PS_INPUT_CNTL_10__DUP__SHIFT … macro