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Searched refs:SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7662 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK 0x000ffc00L macro
H A Dgfx_7_2_sh_mask.h9183 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK 0xffc00 macro
H A Dgfx_8_0_sh_mask.h10903 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK 0xffc00 macro
H A Dgfx_8_1_sh_mask.h11301 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK 0xffc00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21581 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_2_1_sh_mask.h22859 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_1_sh_mask.h22892 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_4_3_sh_mask.h25054 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_4_2_sh_mask.h16674 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_11_0_0_sh_mask.h31783 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_11_0_3_sh_mask.h34281 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_10_1_0_sh_mask.h31530 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro
H A Dgc_10_3_0_sh_mask.h29898 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1_MASK … macro