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Searched refs:SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h11092 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h12818 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h13216 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4467 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h3851 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_9_1_sh_mask.h3945 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h4791 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h24784 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h7471 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h9018 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h8715 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h9026 #define SPI_CSQ_WF_ACTIVE_COUNT_3__COUNT__SHIFT … macro