Searched refs:SPARE_REG0 (Results 1 – 1 of 1) sorted by relevance
221 #define SPARE_REG0 0x55c macro3457 spare_reg_ctx = readl_relaxed(clk_base + SPARE_REG0); in tegra210_clk_suspend()3478 writel_relaxed(spare_reg_ctx, clk_base + SPARE_REG0); in tegra210_clk_resume()3782 value = readl(clk_base + SPARE_REG0) >> CLK_M_DIVISOR_SHIFT; in tegra210_clock_init()