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Searched refs:SOR_PLL2_SEQ_PLLCAPPD (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/tegra/
H A Dsor.h121 #define SOR_PLL2_SEQ_PLLCAPPD (1 << 17) macro
H A Dsor.c1462 value |= SOR_PLL2_SEQ_PLLCAPPD; in tegra_sor_power_down()
2781 value |= SOR_PLL2_SEQ_PLLCAPPD; in tegra_sor_dp_enable()