Searched refs:SMU_VER_55_51_0 (Results 1 – 1 of 1) sorted by relevance
46 #define SMU_VER_55_51_0 0x373300 /* SMU Version that is able to set DISPCLK below 100MHz */ macro734 if (clk_mgr->smu_ver >= SMU_VER_55_51_0) in rn_clk_mgr_construct()