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Searched refs:SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h1484 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h1514 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h1422 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h1550 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h2605 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1307 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h2105 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h2761 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_1_0_sh_mask.h3604 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h5584 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h6181 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h2176 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h10343 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h2243 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h2373 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h2762 #define SMU_INTERRUPT_CONTROL__DC_SMU_INT_STATUS__SHIFT … macro