Searched refs:SMMU_BASE (Results 1 – 4 of 4) sorted by relevance
150 #define SMMU_SCR0 (SMMU_BASE + 0x0)151 #define SMMU_SCR1 (SMMU_BASE + 0x4)152 #define SMMU_SCR2 (SMMU_BASE + 0x8)153 #define SMMU_SACR (SMMU_BASE + 0x10)154 #define SMMU_IDR0 (SMMU_BASE + 0x20)155 #define SMMU_IDR1 (SMMU_BASE + 0x24)157 #define SMMU_NSCR0 (SMMU_BASE + 0x400)158 #define SMMU_NSCR2 (SMMU_BASE + 0x408)159 #define SMMU_NSACR (SMMU_BASE + 0x410)
52 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro145 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro214 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro270 #define SMMU_BASE 0x09000000 macro329 #define SMMU_BASE 0x09000000 macro
667 #define SMMU_SCR0 (SMMU_BASE + 0x0)668 #define SMMU_SCR1 (SMMU_BASE + 0x4)669 #define SMMU_SCR2 (SMMU_BASE + 0x8)670 #define SMMU_SACR (SMMU_BASE + 0x10)671 #define SMMU_IDR0 (SMMU_BASE + 0x20)672 #define SMMU_IDR1 (SMMU_BASE + 0x24)674 #define SMMU_NSCR0 (SMMU_BASE + 0x400)675 #define SMMU_NSCR2 (SMMU_BASE + 0x408)676 #define SMMU_NSACR (SMMU_BASE + 0x410)
183 #ifdef SMMU_BASE185 ldr x1, =SMMU_BASE