Searched refs:SMC_RESP_0__SMC_RESP_MASK (Results 1 – 8 of 8) sorted by relevance
40 if ((RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK) != 0) in amdgpu_kv_notify_message_to_smu()44 tmp = RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK; in amdgpu_kv_notify_message_to_smu()
282 #define SMC_RESP_0__SMC_RESP_MASK 0xffffffffL macro
361 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
375 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
357 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
359 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
403 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro