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Searched refs:SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h8830 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h8188 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h7252 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h7142 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h8254 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h5158 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1789 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h2884 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h2683 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h4177 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h2368 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h1725 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h2935 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h2844 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h10998 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h2941 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h2951 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT__SHIFT … macro