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Searched refs:SIT0_NXT_SUVD_CGC_CTRL__MPC1_MODE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_4_0_0_sh_mask.h2425 #define SIT0_NXT_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h2425 #define SIT0_NXT_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro