Searched refs:SIFIVE_U_PRCI_PLLCFG0_FSE (Results 1 – 2 of 2) sorted by relevance
73 s->corepllcfg0 |= SIFIVE_U_PRCI_PLLCFG0_FSE; in sifive_u_prci_write()80 s->ddrpllcfg0 |= SIFIVE_U_PRCI_PLLCFG0_FSE; in sifive_u_prci_write()90 s->gemgxlpllcfg0 |= SIFIVE_U_PRCI_PLLCFG0_FSE; in sifive_u_prci_write()138 SIFIVE_U_PRCI_PLLCFG0_DIVQ | SIFIVE_U_PRCI_PLLCFG0_FSE | in sifive_u_prci_reset()141 SIFIVE_U_PRCI_PLLCFG0_DIVQ | SIFIVE_U_PRCI_PLLCFG0_FSE | in sifive_u_prci_reset()144 SIFIVE_U_PRCI_PLLCFG0_DIVQ | SIFIVE_U_PRCI_PLLCFG0_FSE | in sifive_u_prci_reset()
49 #define SIFIVE_U_PRCI_PLLCFG0_FSE (1 << 25) macro