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Searched refs:SIFIVE_U_PRCI_PLLCFG0_DIVR (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/misc/
H A Dsifive_u_prci.c137 s->corepllcfg0 = SIFIVE_U_PRCI_PLLCFG0_DIVR | SIFIVE_U_PRCI_PLLCFG0_DIVF | in sifive_u_prci_reset()
140 s->ddrpllcfg0 = SIFIVE_U_PRCI_PLLCFG0_DIVR | SIFIVE_U_PRCI_PLLCFG0_DIVF | in sifive_u_prci_reset()
143 s->gemgxlpllcfg0 = SIFIVE_U_PRCI_PLLCFG0_DIVR | SIFIVE_U_PRCI_PLLCFG0_DIVF | in sifive_u_prci_reset()
/openbmc/qemu/include/hw/misc/
H A Dsifive_u_prci.h46 #define SIFIVE_U_PRCI_PLLCFG0_DIVR (1 << 0) macro