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Searched refs:SIFIVE_U_DEV_QSPI2 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Dsifive_u.c82 [SIFIVE_U_DEV_QSPI2] = { 0x10050000, 0x1000 },
350 (long)memmap[SIFIVE_U_DEV_QSPI2].base); in create_fdt()
359 0x0, memmap[SIFIVE_U_DEV_QSPI2].base, in create_fdt()
360 0x0, memmap[SIFIVE_U_DEV_QSPI2].size); in create_fdt()
365 (long)memmap[SIFIVE_U_DEV_QSPI2].base); in create_fdt()
934 memmap[SIFIVE_U_DEV_QSPI2].base); in sifive_u_soc_realize()
/openbmc/qemu/include/hw/riscv/
H A Dsifive_u.h91 SIFIVE_U_DEV_QSPI2, enumerator