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Searched refs:SIFIVE_U_DEV_DMC (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/riscv/
H A Dsifive_u.h93 SIFIVE_U_DEV_DMC, enumerator
/openbmc/qemu/hw/riscv/
H A Dsifive_u.c88 [SIFIVE_U_DEV_DMC] = { 0x100b0000, 0x10000 },
922 memmap[SIFIVE_U_DEV_DMC].base, memmap[SIFIVE_U_DEV_DMC].size); in sifive_u_soc_realize()