Searched refs:SIFIVE_SPI_REG_CSDEF (Results 1 – 1 of 1) sorted by relevance
29 #define SIFIVE_SPI_REG_CSDEF 0x14 /* Chip select default */ macro141 sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, spi->cs_inactive); in sifive_spi_prepare_message()353 spi->cs_inactive = sifive_spi_read(spi, SIFIVE_SPI_REG_CSDEF); in sifive_spi_probe()354 sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, 0xffffffffU); in sifive_spi_probe()355 cs_bits = sifive_spi_read(spi, SIFIVE_SPI_REG_CSDEF); in sifive_spi_probe()356 sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, spi->cs_inactive); in sifive_spi_probe()