Searched refs:SH73A0_CLK_PLL2 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm/boot/dts/renesas/ |
| H A D | sh73a0.dtsi | 661 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
670 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
679 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
689 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
697 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
703 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
710 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
760 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
774 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
781 <&cpg_clocks SH73A0_CLK_PLL2>, <0>;
[all …]
|
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | sh73a0-clock.h | 13 #define SH73A0_CLK_PLL2 3 macro
|