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Searched refs:SET_MEDIUM_FREQ (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_ip.h62 SET_MEDIUM_FREQ, enumerator
H A Dddr3_debug.c407 (training_result[SET_MEDIUM_FREQ] in ddr3_tip_print_log()
H A Dddr3_training.c2152 training_stage = SET_MEDIUM_FREQ; in ddr3_tip_ddr3_training_main_flow()