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Searched refs:SEC_RAS_CE_REG (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/crypto/hisilicon/sec2/
H A Dsec_main.c44 #define SEC_RAS_CE_REG 0x301050 macro
671 writel(ce, qm->io_base + SEC_RAS_CE_REG); in sec_hw_error_enable()
691 writel(SEC_RAS_DISABLE, qm->io_base + SEC_RAS_CE_REG); in sec_hw_error_disable()