Searched refs:SD_STS_FIFO_READY (Results 1 – 4 of 4) sorted by relevance
176 #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ macro
147 #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ macro
585 st->ctl = SD_STS_FIFO_READY << 24 | SD_CTL_STREAM_RESET; in intel_hda_set_st_ctl()834 .reset = SD_STS_FIFO_READY << 24 \
728 SD_STS_FIFO_READY)) in snd_hdac_stream_sync()