Searched refs:SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0 (Results 1 – 2 of 2) sorted by relevance
2131 #define SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0 GENMASK(5, 4) macro2133 FIELD_PREP(SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0, x)2135 FIELD_GET(SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0, x)
997 SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0, in sparx5_cmu_apply_cfg()