SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB (reference) in projects: openbmc

Searched refs:SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A D	wrap_sdram_config.c	`35 SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB) \|`
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A D	sdram_gen5.h	`249 #define SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB 0 macro`