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Searched refs:SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h805 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
H A Dsdma1_4_2_2_sh_mask.h823 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK … macro
H A Dsdma1_4_2_sh_mask.h819 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3330 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h3292 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3401 #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE_MASK … macro