Home
last modified time | relevance | path

Searched refs:SDMA1_UCODE_ADDR__VALUE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h28 #define SDMA1_UCODE_ADDR__VALUE_MASK 0x00001FFFL macro
H A Dsdma1_4_2_2_sh_mask.h28 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
H A Dsdma1_4_2_sh_mask.h28 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1505 #define SDMA1_UCODE_ADDR__VALUE_MASK 0xfff macro
H A Doss_2_0_sh_mask.h1353 #define SDMA1_UCODE_ADDR__VALUE_MASK 0x7ff macro
H A Doss_3_0_1_sh_mask.h2009 #define SDMA1_UCODE_ADDR__VALUE_MASK 0x1fff macro
H A Doss_3_0_sh_mask.h2313 #define SDMA1_UCODE_ADDR__VALUE_MASK 0x1fff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h2838 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h5127 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
H A Dgc_11_0_3_sh_mask.h5617 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
H A Dgc_10_1_0_sh_mask.h40225 #define SDMA1_UCODE_ADDR__VALUE_MASK macro
H A Dgc_10_3_0_sh_mask.h37193 #define SDMA1_UCODE_ADDR__VALUE_MASK macro