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Searched refs:SDMA1_STATUS_REG__REG_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h480 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT 0x1 macro
H A Dsdma1_4_2_2_sh_mask.h482 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h478 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1590 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT 0x1 macro
H A Doss_2_0_sh_mask.h1430 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT 0x1 macro
H A Doss_3_0_1_sh_mask.h2108 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT 0x1 macro
H A Doss_3_0_sh_mask.h2412 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT 0x1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h2985 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2691 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2760 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h2960 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3069 #define SDMA1_STATUS_REG__REG_IDLE__SHIFT … macro