Home
last modified time | relevance | path

Searched refs:SDMA1_STATUS_REG__MC_WR_IDLE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h521 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK 0x00002000L macro
H A Dsdma1_4_2_2_sh_mask.h523 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dsdma1_4_2_sh_mask.h519 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1613 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_2_0_sh_mask.h1453 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_3_0_1_sh_mask.h2131 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_3_0_sh_mask.h2435 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3026 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2732 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2803 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h3001 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3110 #define SDMA1_STATUS_REG__MC_WR_IDLE_MASK … macro