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Searched refs:SDMA1_RLC1_RB_BASE__ADDR_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1642 #define SDMA1_RLC1_RB_BASE__ADDR_MASK 0xFFFFFFFFL macro
H A Dsdma1_4_2_2_sh_mask.h1658 #define SDMA1_RLC1_RB_BASE__ADDR_MASK … macro
H A Dsdma1_4_2_sh_mask.h1650 #define SDMA1_RLC1_RB_BASE__ADDR_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1967 #define SDMA1_RLC1_RB_BASE__ADDR_MASK 0xffffffff macro
H A Doss_2_0_sh_mask.h1751 #define SDMA1_RLC1_RB_BASE__ADDR_MASK 0xffffffff macro
H A Doss_3_0_1_sh_mask.h2941 #define SDMA1_RLC1_RB_BASE__ADDR_MASK 0xffffffff macro
H A Doss_3_0_sh_mask.h3049 #define SDMA1_RLC1_RB_BASE__ADDR_MASK 0xffffffff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4266 #define SDMA1_RLC1_RB_BASE__ADDR_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4210 #define SDMA1_RLC1_RB_BASE__ADDR_MASK … macro
H A Dgc_10_3_0_sh_mask.h4393 #define SDMA1_RLC1_RB_BASE__ADDR_MASK … macro