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Searched refs:SDMA1_RLC1_IB_RPTR__OFFSET_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1686 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK 0x003FFFFCL macro
H A Dsdma1_4_2_2_sh_mask.h1704 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK … macro
H A Dsdma1_4_2_sh_mask.h1696 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1999 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK 0x3ffffc macro
H A Doss_2_0_sh_mask.h1783 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK 0x3ffffc macro
H A Doss_3_0_1_sh_mask.h2975 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK 0x3ffffc macro
H A Doss_3_0_sh_mask.h3083 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK 0x3ffffc macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4312 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4254 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK … macro
H A Dgc_10_3_0_sh_mask.h4437 #define SDMA1_RLC1_IB_RPTR__OFFSET_MASK … macro