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Searched refs:SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1461 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT 0x0 macro
H A Dsdma1_4_2_sh_mask.h1467 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1475 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1658 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1858 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h2804 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h2918 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4077 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4025 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4198 #define SDMA1_RLC0_RB_RPTR__OFFSET__SHIFT … macro