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Searched refs:SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1449 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x00001000L macro
H A Dsdma1_4_2_2_sh_mask.h1463 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK … macro
H A Dsdma1_4_2_sh_mask.h1455 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1843 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x1000 macro
H A Doss_2_0_sh_mask.h1643 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x1000 macro
H A Doss_3_0_1_sh_mask.h2789 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x1000 macro
H A Doss_3_0_sh_mask.h2903 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x1000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4065 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4012 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h4185 #define SDMA1_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK … macro