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Searched refs:SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1445 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
H A Dsdma1_4_2_2_sh_mask.h1459 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h1451 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1852 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
H A Doss_2_0_sh_mask.h1652 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
H A Doss_3_0_1_sh_mask.h2798 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
H A Doss_3_0_sh_mask.h2912 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4061 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4007 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4180 #define SDMA1_RLC0_RB_CNTL__RB_VMID__SHIFT … macro