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Searched refs:SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1499 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
H A Dsdma1_4_2_2_sh_mask.h1515 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h1507 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1886 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_2_0_sh_mask.h1686 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h2834 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h2948 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4117 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4063 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4236 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT … macro