Home
last modified time | relevance | path

Searched refs:SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1505 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT 0x5 macro
H A Dsdma1_4_2_2_sh_mask.h1521 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h1513 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1890 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT 0x5 macro
H A Doss_2_0_sh_mask.h1690 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT 0x5 macro
H A Doss_3_0_1_sh_mask.h2838 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT 0x5 macro
H A Doss_3_0_sh_mask.h2952 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT 0x5 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4123 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4069 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4242 #define SDMA1_RLC0_IB_BASE_LO__ADDR__SHIFT … macro