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Searched refs:SDMA1_GFX_RB_BASE_HI__ADDR_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1084 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK 0x00FFFFFFL macro
H A Dsdma1_4_2_sh_mask.h1086 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK … macro
H A Dsdma1_4_2_2_sh_mask.h1094 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1563 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK 0xffffff macro
H A Doss_2_4_sh_mask.h1747 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK 0xffffff macro
H A Doss_3_0_1_sh_mask.h2655 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK 0xffffff macro
H A Doss_3_0_sh_mask.h2775 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK 0xffffff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3682 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h3640 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK … macro
H A Dgc_10_3_0_sh_mask.h3791 #define SDMA1_GFX_RB_BASE_HI__ADDR_MASK … macro