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Searched refs:SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1188 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT 0x0 macro
H A Dsdma1_4_2_2_sh_mask.h1200 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h1192 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1830 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h2750 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h2870 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3790 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h3740 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3897 #define SDMA1_GFX_CSA_ADDR_HI__ADDR__SHIFT … macro