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Searched refs:SDMA1_BASE__INST5_SEG2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h751 #define SDMA1_BASE__INST5_SEG2 0 macro
H A Dsienna_cichlid_ip_offset.h948 #define SDMA1_BASE__INST5_SEG2 0 macro
H A Darct_ip_offset.h1004 #define SDMA1_BASE__INST5_SEG2 0 macro
H A Daldebaran_ip_offset.h1285 #define SDMA1_BASE__INST5_SEG2 0 macro