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Searched refs:SDMA1_BASE__INST3_SEG1 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h736 #define SDMA1_BASE__INST3_SEG1 0 macro
H A Dsienna_cichlid_ip_offset.h935 #define SDMA1_BASE__INST3_SEG1 0 macro
H A Dvega10_ip_offset.h1044 #define SDMA1_BASE__INST3_SEG1 0 macro
H A Darct_ip_offset.h989 #define SDMA1_BASE__INST3_SEG1 0 macro
H A Daldebaran_ip_offset.h1270 #define SDMA1_BASE__INST3_SEG1 0x02446C00 macro