Home
last modified time | relevance | path

Searched refs:SDMA0_QUEUE5_MIDCMD_DATA1__DATA1_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2123 #define SDMA0_QUEUE5_MIDCMD_DATA1__DATA1_MASK … macro
H A Dgc_11_0_3_sh_mask.h2182 #define SDMA0_QUEUE5_MIDCMD_DATA1__DATA1_MASK … macro